Paper-Conference

Stream-HLS: Towards Automatic Dataflow Acceleration

TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs

A Comprehensive Automated Exploration Framework for Systolic Array Designs

Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver

A Versatile Systolic Array for Transposed and Dilated Convolution on FPGA

A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications

SPAR-2: A SIMD Processor Array for Machine Learning in IoT Devices